Archived Material
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L1: Introduction and Binary Representation [pdf] [worksheet] [solutions]
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L2: Introduction and Assembly and RISC-V [pdf] [worksheet] [solutions]
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L3: Compiling Code and Implementing Procedures [pdf] [worksheet] [solutions]
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L4: Procedures, Stacks, and MMIO [pdf] [worksheet A] [solutions A] [worksheet B] [solutions B]
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L5: The Digital Abstraction [pdf] [worksheet] [solutions]
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L6: Boolean Algebra and Logic Synthesis [pdf] [worksheet] [solutions]
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L7: CMOS Technology [pdf] [worksheet] [solutions]
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L8: Combinational Logic and Introduction to Minispec [pdf] [worksheet] [solutions]
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L9: Complex Combinational Logic [pdf] [worksheet] [solutions]
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L10: Sequential Circuits [pdf] [worksheet] [solutions]
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L11: Sequential Circuits in Minispec [pdf] [worksheet] [solutions]
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L12: Introduction to Pipelining [pdf] [worksheet] [solutions]
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L13: RISC-V Processor [pdf] [worksheet] [solutions]
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L14: Memory Hierarchy [pdf] [worksheet] [solutions]
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L15: Caches [pdf] [worksheet] [solutions]
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L16: Operating Systems [pdf] [worksheet] [OS demo]
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L17: Virtual Memory [pdf] [worksheet] [solutions]
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L18: Pipelined Processors [pdf] [worksheet] [solutions]
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L19: Data and Control Hazards in Pipelined Processors [pdf] [worksheet] [solutions]
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L20: Synchronization [pdf] [worksheet] [solutions]
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L21: Modern Processor Architecture [pdf]